Apparatus and method for demodulating a square root of the sum of two squares

ABSTRACT

An apparatus and method for demodulating a square root of the sum of squares of two inputs I and Q in a digital signal processing are provided. The square root {square root over (I 2 +Q 2 )} is approximated by an equation aX +bY, wherein coefficients a and b are special binary numbers. Due to the numbers, the square root {square root over (I 2 +Q 2 )} can be quickly computed by the operation of shifting and addition. A plurality of possible approximation values for the coefficients a and b are provided, as well as the use of a comparator to select the maximal one among the possible approximation values.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an apparatus and method fordemodulating a square root of the sum of two squares, especially to anapparatus and method for demodulating a square root of the sum of twosquares using the characteristic of a binary number to reduce thehardware cost and time consumption.

2. Description of Related Art

In the field of signal processing, to demodulate a square root {squareroot over (I²+Q²)} of the sum of two squares of inputs I and Q is acommon question. If we want to achieve an exact result of the squareroot, a lot of hardware cost and time will be wasted. Therefore, theresearchers in the industry try to find out an approximation with anacceptable distortion to reduce the hardware cost and time consumption.A prior art is disclosed in the specification of a U.S. Patent whoseapplication Ser. No. is 09,049,605, now U.S. Pat. No. 6,070,181, andwhose title is “METHOD AND CIRCUIT FOR ENVELOPE DETECTION USING A PEELCONE APPROXIMATION.” The prior art approximates the square root {squareroot over (I²+Q²)} with the value of an equation aX+bY, wherein X=|I|,Y=|Q|. The prior art firstly adopt a section-division method to divide arectangular coordinate between 0 degree to 45 degree into a plurality ofregions, and then uses a ROM to store coefficients a and b correspondingto the plurality regions. The ratio of X to Y is used to determine inwhich region the square root {square root over (I²+Q²)} is located, andtherefore uses a look-up table to capture the coefficients a and bcorresponding to the located region. Finally, a multiplier/adder is usedto calculate the result of the equation aX+bY to approximate the squareroot {square root over (I²+Q²)}. When computing the square-rootapproximation, the prior art uses a ROM and a multiplier/adder, andtherefore creates the drawbacks of large hardware cost and timeconsumption.

SUMMARY OF THE INVENTION

Accordingly, an object of the present invention is to resolve thedrawbacks of large hardware cost and time consumption in the prior art.In order to accomplish the object, the present invention proposes anapparatus and method for demodulating a square root of the sum of twosquares. Like the prior art, the present invention approximates thesquare root {square root over (I² +Q²)} of the sum of two squares ofinputs I and Q with an equation aX+bY, wherein X=|I|, Y=|Q|. One ofdifferences from the prior art is that the present invention proposesspecial coefficients a and b, which is suitable to compute the result ofthe equation {square root over (I²+Q²)} rapidly with a special shiftingcharacteristic of a binary number, and therefore eliminate thedisadvantages of large hardware cost and time consumption due to the useof multipliers. Besides, the present invention creates a plurality ofpossible approximations simultaneously, and uses a comparator to selectthe maximal one among the possible approximations. The maximal one isthe exact approximation of the square root {square root over (I²+Q²)} ofthe sum of two squares of inputs I and Q. Depending on thecharacteristic, the present invention can eliminate the disadvantages ofthe prior art which uses a ROM to store a plurality of parameters.

The apparatus of the present invention mainly comprises an absolutevalue determining circuit, a maximal/minimal value determining circuit,a shifter/adder and a comparator. The absolute value determining circuitis used to obtain positive values of two inputs. The maximal/minimalvalue determining circuit is used to determine a maximal and minimalvalues of the positive values. The shifter/adder connected to themaximal/minimal value determining circuit is used to divide the ratio ofA to B into k divisions, and the coefficients of every division arerepresented as a fraction whose denominator is a power of two, wherein kis a positive integer. By the characteristic that left shifting of abinary number represents multiplying the binary number by a power of twoand that right shifting of a binary number represents dividing thebinary number by a power of two, the values of the equationâA+{circumflex over (b)}B of the first to the $\frac{k}{2} - {th}$

divisions are computed. The comparator is used to generate the maximalvalue of the $\frac{k}{2}$

outputs of the shifter/adder, and the largest value is the approximationof the square root of the sum of two squares.

The method of the present invention mainly comprises step (a) to step(d). In step (a), an equation âX+{circumflex over (b)}Y is used toapproximate a square root {square root over (I²+Q²)} of the sum of twosquares of inputs I and Q, wherein X=|I| and Y=|Q|. In step (b), theratio of X to Y is divided into k divisions, and the values of â and{circumflex over (b)} of every division are represented as a fractionwhose denominator is a power of two, wherein k is a positive value. Instep (c), by the characteristic that left shifting of a binary numberrepresents multiplying the binary number by a power of two and that thecharacteristic of right shifting of a binary number represents dividingthe binary number by a power of two, the values of the equation âA+{circumflex over (b)}B of the first to the $\frac{k}{2} - {th}$

divisions are computed, wherein A is the maximal value of X and Y, and Bis the minimal value of X and Y. In step (d), the maximal value of theequation âA+{circumflex over (b)}B of the k divisions is generated, andthe maximal value is the approximation of the square root of the sum oftwo squares.

The present invention also can be implemented by software. Because thepresent invention has the advantages of simple structure and lessoperations, the implementation by software also has the advantages.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be described according to the appendeddrawings in which:

FIG. 1 is a schematic diagram of the 4-division approximation of thepresent invention;

FIG. 2 is a schematic diagram of the 8-division approximation of thepresent invention;

FIG. 3 is a structure diagram of an apparatus according to a firstpreferred embodiment of the present invention;

FIG. 4 is a schematic diagram of the comparators in FIG. 3, and

FIG. 5 is another schematic diagram of the comparators in FIG. 3.

PREFERRED EMBODIMENT OF THE PRESENT INVENTION

Firstly, the present invention approximates the square root {square rootover (I²+Q²)} of the sum of two squares of inputs I and Q with anequation aX+bY, wherein X=|I|, Y=|Q|. One of the differences from theprior art is that the present invention does not use a look-up table tostore coefficients a and b, but uses special coefficients a and b, whichare suitable to compute the values of the equation {square root over(I²+Q²)} rapidly with the special shifting characteristics of a binarynumber, and therefore eliminate the disadvantages of large hardware costand time consumption due to the use of the multipliers.

FIG. 1 is a schematic diagram of the 4-division approximation of thepresent invention, which separates the range from 0 degree to 90 degreeof a rectangular coordinate into four sections: a first section 11, asecond section 12, a third section 13 and a fourth section 14. The twoinput values I and Q are treated respectively as the X axis and Y axisof the rectangular coordinate. The coefficients a and b corresponding toevery point in the four sections are represented respectively as afraction. For example, table 1 including coefficients a, b, anapproximation â of the coefficient a and an approximation {circumflexover (b)} of the coefficient b when using the 4-division approximation.If the angle between a point coordinate (I,Q) and the original point is30 degree, that coordinate is in the second section 12, and the exactvalues of coefficients a and b are then computed as 0.886 and 0.5. Forgenerating the coefficients â and {circumflex over (b)}, due tocooperating with the binary number in a digital system, the denominatorsof the coefficients â and {circumflex over (b)} are presented as a powerof 2, such as 2, 4, 8, 16, 32, and so on. Therefore, the value 0.886 ofthe coefficient a and the value 0.5 of the coefficient b can beapproximated respectively as$\frac{7}{8}\quad {and}\quad {\frac{1}{2}.}$

Because the coefficients a and b corresponding to all points in the foursections are represented as the coefficients â and {circumflex over(b)}, the maximal estimated error will not be over 3.4%. Finally, anequation âX+{circumflex over (b)}Y={circumflex over (r)} is used toapproximate the square root {square root over (I²+Q²)} of the sum of twosquares of inputs I and Q. In other words, X is used to approximate thesquare root in the first section 11,${\frac{7}{8}\quad X} + {\frac{1}{2}Y}$

is used to approximate the square root in the second section 12,${\frac{1}{2}\quad X} + {\frac{7}{8}Y}$

is used to approximate the square root in the third section 13, and Y isused to approximate the square root in the fourth section 14.

TABLE 1 Angle Maximal (degree) a â b {circumflex over (b)} error  0 1   1 0    0 3.4% 30 0.886 ⅞ 0.5  ½ 60 0.5  ½ 0.886 ⅞ 90 0    0 1    1

FIG. 2 is a schematic diagram of the 8-division approximation of thepresent invention, which separates the range from 0 degree to 90 degreeof a rectangular coordinate into eight sections: the first section 21,the second section 22, the third section 23, the fourth section 24, thefifth section 25, the sixth section 26, the seventh section 27 and theeighth section 28. Table 2 is a table including coefficients a, b, anapproximation â of the coefficient a and an approximation {circumflexover (b)} of the coefficient b when using the 8-division approximation.If the angle between a point (I, Q) and the original point is 12.875degree, that point is in the second section 22, and the exact values ofthe coefficients a and b are then computed as 0.9749 and 0.2225. Forgenerating the coefficients â and {circumflex over (b)}, due tocooperating with the binary numbers in a digital system as mentionedabove, the denominators of the coefficients â and {circumflex over (b)}are represented by power of 2, such as 2, 4, 8, 16, 32, and so on.Therefore, the value 0.9749 of the coefficient a and the value 0.2225 ofthe coefficient b can be approximated respectively by$\frac{31}{32}\quad {and}\quad {\frac{7}{32}.}$

Because the coefficients a and b corresponding to all points in theeight sections are represented by the coefficients â and {circumflexover (b)}, the estimated error in the 8-division approximation is lessthan the estimated error in the 4-division approximation. Aftercomputed, the maximal estimated error in the 8-division method will notbe over 0.8%. In other words, the present invention uses X toapproximate the square root in the first section 21,${\frac{31}{32}X} + {\frac{7}{32}Y}$

to approximate the square root in the second section 22,${\frac{29}{32}X} + {\frac{7}{16}Y}$

to approximate the square root in the third section 23,${\frac{25}{32}X} + {\frac{5}{8}Y}$

to approximate the square root in the fourth section 24,${\frac{5}{8}X} + {\frac{25}{32}Y}$

to approximate the square root in the fifth section 25,${\frac{7}{16}X} + {\frac{29}{32}Y}$

to approximate the square root in the sixth section 26,${\frac{7}{32}X} + {\frac{31}{32}Y}$

to approximate the square root in the seventh section 27, Y toapproximate the square root in the eighth section 28.

TABLE 2 Angle Maximal (degree) a â b {circumflex over (b)} error 0  1    1 0    0 0.8% 12.875 0.9749 {fraction (31/32)} 0.2225 {fraction(7/32)} 25.714 0.9010 {fraction (29/32)} 0.4339 {fraction (7/16)} 38.5710.7818 {fraction (25/32)} 0.6235 ⅝ 51.428 0.6235 ⅝ 0.7818 {fraction(25/32)} 64.285 0.4339 {fraction (7/16)} 0.9010 {fraction (29/32)}77.142 0.2225 {fraction (7/32)} 0.9749 {fraction (31/32)} 90    0    01    1

Table 3 is a table including coefficients a, b, an approximation â ofthe coefficient a and an approximation {circumflex over (b)} of thecoefficient b when using the 16-division approximation. If the anglebetween a point (I, Q) and the original point is 6 degree, the exactvalues of coefficients a and b are then computed as 0.9945 and 0.1045.For generating the coefficients â and {circumflex over (b)}, due tocooperating with the binary numbers in a digital system as mentionedabove, the denominators of the coefficients â and {circumflex over (b)}are represented by a power of 2, such as 2, 4, 8, 16, 32, and so on.Therefore, the value 0.9945 of the coefficient a and the value 0.1045 ofthe coefficient b can be approximated respectively by$\frac{127}{128}\quad {and}\quad {\frac{7}{64}.}$

Because the coefficients a and b corresponding to all points in each ofthe sixteen section are represented as the coefficients â and{circumflex over (b)}, the estimated error in the 16-divisionapproximation is less than the estimated error in the 4-divisionapproximation and 8-division approximation. After computed, the maximalestimated error in the 16-division approximation will not be over 0.4%.

TABLE 3 Angle Maximal (degree) a â b {circumflex over (b)} error  0 1   1 0    0 0.4%  6 0.9945 {fraction (127/128)} 0.1045 {fraction (7/64)} 120.9781 {fraction (125/128)} 0.2079 {fraction (13/64)} 18 0.9511{fraction (61/64)} 0.3090 {fraction (5/16)} 24 0.9135 {fraction(117/128)} 0.4067 {fraction (15/32)} 30 0.8660 {fraction (111/128)}0.5   ½ 36 0.8090 {fraction (13/16)} 0.5878 {fraction (75/128)} 420.7431 {fraction (95/128)} 0.6691 {fraction (43/64)} 48 0.6691 {fraction(43/64)} 0.7431 {fraction (95/128)} 54 0.5878 {fraction (75/128)} 0.8090{fraction (13/16)} 60 0.5   ½ 0.8660 {fraction (111/128)} 66 0.4067{fraction (15/32)} 0.9135 {fraction (117/128)} 72 0.3090 {fraction(5/16)} 0.9511 {fraction (61/64)} 78 0.2079 {fraction (13/64)} 0.9781{fraction (125/128)} 84 0.1045 {fraction (7/64)} 0.9945 {fraction(127/128)} 90 0    0 1    1

The present invention can use the other number of sections, such as a32-division approximation, a 64-division approximation, and so on, andthe invention does not limit the section number. Besides, thecoefficients â and {circumflex over (b)} in table 1 to table 3 are notunchangeable, as long as the values of the denominator of thecoefficients â and {circumflex over (b)} are a power of two. Forexample, $\frac{15}{32}$

in table 3 can be replaced by $\frac{29}{64}.$

FIG. 3 is a structure diagram of an apparatus according to the firstpreferred embodiment of the present invention. The present inventioncomprises an absolute value determining circuit 31 and a maximal/minimalvalue determining circuit 32, a shifter/adder 33 and a comparator 34.The absolute value determining circuit 31 determines absolute values oftwo inputs I and Q and generates X and Y, wherein X=|I| and Y=|Q|. Themaximal/minimal value determining circuit 32 is used to generate amaximal value A and minimal value B from X and Y. The values of â and{circumflex over (b)} in table 1 to table 3 have the property oflower-upper and left-right symmetry. For example, in table 3, the valueof â with the angle of 6 degree is equal to the value of {circumflexover (b)} with the angle of 84 degree, and the value of â with the angleof 12 degree is equal to the value of {circumflex over (b)} with theangle of 78 degree. By using the absolute value determining circuit 31and maximal/minimal value determining circuit 32, the present inventionjust needs to accomplish half content of table 1 to 3, and therefore onehalf of the hardware cost can be saved. The shifter/adder 33 is atechnical characteristic of the present invention. According to thenumber of divisions, such as k divisions, and according to the values ofâ and {circumflex over (b)} in table 1 to table 3, the shifter/adder 33computes the values of the equation âA+{circumflex over(b)}B={circumflex over (r)} of $\frac{k}{2}$

divisions. Due to the property of binary number in a digital system, thecomputation of âA and {circumflex over (b)}B do not involvemultiplication, but a simple operation of shift and addition. Forexample, in table 3, coefficients$\hat{a} = {{\frac{127}{128}\quad {and}\quad \hat{b}} = \frac{7}{64}}$

are used to represent an equation${\frac{127}{128}A} + {\frac{7}{64}B}$

and the equation can be expanded as$\frac{\left( {{64A} + {32A} + {16A} + {8A} + {4A} + {2A} + A} \right)}{128} + {\frac{\left( {{4B} + {2B} + B} \right)}{64}.}$

In a digital system, a binary number multiplied by a power t of two isto shift the binary number to the left for t bits, and a binary numberdivided by a power t of two is to shift the binary number to the rightfor t bits. According to the rule mentioned above, $\frac{127}{128}A$

is obtained by accumulating all A's by shifting left for 6 bits, 5 bits,4 bits, 3 bits, 2 bits, 1 bit and 0 bit, and then the sum is shifted tothe right for 7 bits to obtain the result after division by 128.$\frac{7}{64}B$

is obtained by accumulating all B's by shifting to the left for 2 bits,1 bit and 0 bit, and then the sum is shifted to the left for 6 bits toobtain the result after division by 64. The comparator 34 is used toselect the maximal value of $\frac{k}{2}$

outputs of the shifter/adder 33 and the maximal value is theapproximation {circumflex over (r)} of the square root {square root over(I²+Q²)} of the sum of two squares of inputs I and Q.

FIG. 4 is a schematic diagram of the comparators in FIG. 3. Thestructure in FIG. 4 is used in a 16-division approximation, andtherefore eight inputs are needed. The coefficients a and b of the eightinputs are shown in the entries of angles 0 to 42 in table 3.

FIG. 5 is a schematic diagram of the comparator in FIG. 3. In FIG. 4, acomparator 34 with $\frac{k}{2}$

inputs is used to deal with the $\frac{k}{2}$

outputs of the shifter/adder 33. In fact, a plurality of comparators 51with less than $\frac{k}{2}$

inputs can be cascaded to form a topology of a tree structure as shownin FIG. 5 to replace the comparator 34 with $\frac{k}{2}$

inputs. The present invention is not limited to the topology.

The above-described embodiments of the present invention are intended tobe illustrated only. Numerous alternative embodiments may be devised bythose skilled in the art without departing from the scope of thefollowing claims.

What is claimed is:
 1. An apparatus for demodulating a square root ofthe sum of squares of two inputs I and Q in a digital signal processing,said apparatus calculating values of an equation âX+{circumflex over(b)}Y to approximate the value of a square root {square root over(I²+Q²)}, said apparatus comprising: an absolute value determiningcircuit for obtaining positive values X and Y respectively from theinputs I and Q; a maximal/minimal value determining circuit fordetermining a maximal value A and a minimal value B respectivelycorresponding to the outputs X and Y of said absolute value determiningcircuit; a shifter/adder connected to said maximal/minimal valuedetermining circuit for dividing the ratio of A to B into k divisions,values of â and {circumflex over (b)} of every division beingrepresented as a fraction whose denominator being a power of two; byshifting a binary number to the left to multiply the binary number by apower of two and shifting a binary number to the right to divide thebinary number by a power of two, the values of the first to the$\frac{k}{2} - {th}$

 divisions according to an equation âA+{circumflex over (b)}B beingcomputed, wherein k is a positive value; and a comparator for generatinga maximal value of the $\frac{k}{2}$

 outputs of said shifter/adder, said maximal value is the approximationvalue of the square root {square root over (I²+Q²)}.
 2. The apparatus ofclaim 1, wherein said comparator is formed by cascading a plurality ofcomparators whose input ports are less than $\frac{k}{2}.$


3. A method for demodulating a square root of the sum of two squares oftwo inputs I and Q in a digital signal processing, comprising thefollowing steps: (a) using an equation âX+{circumflex over (b)}Y toapproximate the value of a square root {square root over (I²+Q²)},wherein X=|I| and Y=|Q|; (b) dividing the ratio of X to Y into kdivisions, values of â and {circumflex over (b)} of every division beingrepresented as a fraction whose denominator being a power of two,wherein k is a positive value; (c) by shifting a binary number to theleft to multiply the binary number by a power of two and shifting abinary number to the tight to divide the binary number by a power oftwo, the values of the first to the k-th divisions according to saidequation âX+{circumflex over (b)}Y are computed; and (d) generating amaximal value among the values of the k divisions, said maximal value isthe approximation value of the square root {square root over (I²+Q²)}.4. The method of claim 3, wherein in step (b), the values of â and{circumflex over (b)} of the first to the $\frac{k}{2} - {th}$

divisions are equal to the values of {circumflex over (b)} and â of thek-th to $\left( {\frac{k}{2} + 1} \right) - {th}$

divisions; by the property of symmetry, the values of the first to the$\frac{k}{2} - {th}$

divisions according to an equation âA+{circumflex over (b)}B arecomputed only in step (c), wherein A is the maximal value between X andY, and B is the minimal value between X and Y.
 5. The method of claim 4,wherein in step (d), the maximal value among the values of the first tothe $\frac{k}{2} - {th}$

divisions is selected as the approximation value of the square root{square root over (I²+Q²)}.